Hudson River Trading
Hardware Engineer Internship - Summer 2027
New York, NY, United States · Internship · Posted Aug 31, 2026
- Education
- Full-time student in a Computer Engineering, Electrical Engineering, or related program.
About the job
Design and verify FPGA/ASIC hardware for low-latency trading systems through projects spanning hardware design and verification.
What you'll do
- Create hardware designs in SystemVerilog and build modeling and testing environments in Python.
- Complete independent projects in hardware design and verification.
- Work with FPGA/ASIC technology on critical, real-time infrastructure.
What they ask for
- Be a full-time student in Computer Engineering, Electrical Engineering, or a related program, graduating and seeking full-time roles in 2028.
- Have a thorough understanding of digital logic design and/or computer architecture.
- Have experience with a hardware design language such as SystemVerilog.
- Be familiar with C++ and/or Python, and Linux command prompt.
Nice to have
- Familiarity with FPGAs or ASICs.
- Exposure to a hardware verification flow such as UVM or tools such as cocotb.
Pay
5,800 USD weekly base salary
Tools
FPGA, ASIC, SystemVerilog, Python, C++, Linux, UVM, cocotb
AI focus
The hardware team builds machine learning accelerators; no specific AI work is stated for this internship.
Model-written summary · the original posting is authoritative