Intel
EDA Tools Hardware Engineer
$142K–$269K
US, California, Santa Clara +3 · Full-time · Posted Oct 2, 2026
- Location
- US, California, Santa Clara
US, Oregon, Hillsboro
US, California, Folsom
US, Texas, Austin - Experience
- Bachelor’s degree with 6+ years; or Master’s degree with 4+ years; or PhD with 2+ years.
- Education
- Bachelor’s degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field; Master’s or PhD also accepted.
About the job
Develops and maintains full-chip physical implementation flows and methodologies to support scalable SoC integration and silicon design.
What you'll do
- Develop and maintain full-chip implementation flows for floor planning, hierarchical integration, placement and routing, power planning, and clock tree synthesis.
- Enable scalable SoC assembly for multi-block and multi-power-domain designs.
- Define methodologies for hierarchical design reuse and integration.
What they ask for
- Bachelor’s degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field, or a higher degree with the required experience.
- Physical design fundamentals, including placement and routing.
- Clock tree synthesis (CTS).
- Full-chip integration methodologies using Innovus.
Nice to have
- Static timing analysis (STA), power grid design, or IR drop concepts.
- Large SoC or multi-block implementation flows; scripting and automation in Linux environments.
Pay
$141,910.00-269,100.00 USD (target compensation; posting does not specify base salary or total pay)
Tools
Innovus, Linux
Model-written summary · the original posting is authoritative