Drimva

Intel

Intel Foundry Advanced Device Development Engineering Manager

$225K–$318K

US, Oregon, Hillsboro +3 · Manager · Full-time · Posted Sep 22, 2026

Location
US, Oregon, Hillsboro
US, California, San Diego
US, California, Folsom
US, California, Santa Clara
Experience
Ph.D. with 10+ years of advanced-node semiconductor industry experience OR Master’s with 15+ years.
Education
Degree in Electrical Engineering, Physics, Material Science, or a scientific field directly related to Semiconductor.

About the job

Leads a device engineering team developing advanced semiconductor device architectures and high-volume-capable process technology for Intel and foundry products.

What you'll do

  • Lead device engineers and coordinate development across integration, module, design/modeling, and reliability teams.
  • Set team priorities, support employee development, manage performance, and ensure an inclusive work environment.
  • Deliver and validate PDKs, test structures, and device analyses using silicon, electrical, yield, and fab data.

What they ask for

  • Experience in the advanced-node semiconductor industry in at least one of: semiconductor materials, fabrication, device physics, or electrical characterization of semiconductor devices.
  • Degree in Electrical Engineering, Physics, Material Science, or a scientific field directly related to semiconductors.

Nice to have

  • Advanced transistor device structures and device physics; process-monitoring test-structure design and layout; device and circuit simulation; SPC or DOE.
  • Expertise in data analysis or programming tools, or in agentic AI, LLM workflows, machine learning, deep learning, RAG, knowledge engineering, and dataflow pipelines.

Pay

$224,970.00-317,600.00 USD (annual target compensation; base salary or total pay not specified)

Tools

JMP, MATLAB, Octave, JSL, Perl, TCL, Python, SQL

AI focus

Preferred expertise includes agentic AI and orchestrated LLM workflows, machine learning, deep learning, RAG, knowledge engineering, and dataflow pipeline architectures.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 4, 2026 (UTC)