Drimva

Intel

Intel Foundry Product Yield Development Engineer

$142K–$269K

US, Oregon, Hillsboro +1 · Full-time · Posted Oct 29, 2026

Location
US, Oregon, Hillsboro
US, Texas, Austin
Experience
Ph.D. path: 2+ years in advanced semiconductor devices and process flow; Master’s path: 4+ years in advanced semiconductor devices and process flow. Preferred: 2+ years with data analysis systems and software tools; 2+ years in yield projection with EOL signals and in line parameters.
Education
Ph.D. or Master’s degree in a semiconductor science-related STEM degree in engineering, physical science, computer science, or related field.

About the job

Develops yield-improvement methods and tools for advanced semiconductor process technologies, identifies root causes of yield limiters, and supports product manufacturability and production ramp-up.

What you'll do

  • Analyze fab process, defect, and electrical data to identify anomalies and yield limiters; develop algorithms and recommend process changes.
  • Build statistical, machine-learning, and AI/ML applications and computational tools for yield modeling, design efficiency, and faster debugging.
  • Collaborate on product introductions, design-technology co-optimization, experiments, measurement recipes, and production issue resolution.

What they ask for

  • Ph.D. in a semiconductor science-related STEM field in engineering, physical science, computer science, or related field, plus 2+ years of experience in advanced semiconductor devices and process flow; OR Master’s degree in such a field, plus 4+ years of that experience.

Nice to have

  • 2+ years of experience with data analysis systems and software tools.
  • 2+ years of experience in yield projection with EOL signals and in line parameters; project/program management experience and cross-organizational collaboration are also preferred.

Pay

$141,910.00-269,100.00 USD annual base salary

Tools

machine learning, AI/ML

AI focus

Develops AI/ML applications and computational tools to bridge design and manufacturing, improve design efficiency, and reduce debug time.

Model-written summary · the original posting is authoritative

First seen Oct 30, 2026 · Last verified Nov 4, 2026 (UTC)