Intel
Quantum IC Package Substrate Design Engineer
$122K–$173K
US, Oregon, Hillsboro · Full-time · Posted Sep 23, 2026
- Experience
- 5+ years with a B.S.; or 3+ years with an M.S.
- Education
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
About the job
Designs and validates large-format IC package substrates for Intel’s silicon quantum computing systems, coordinating integration and tapeout with stakeholders and suppliers.
What you'll do
- Design IC substrates using Siemens Xpedition, including validation and verification such as DRC and LVS.
- Integrate advanced 2.5D and 3D packaging, and coordinate design feedback, milestones, and supplier tapeout.
- Communicate designs through presentations and documentation; stay current with packaging developments.
What they ask for
- B.S. in Electrical Engineering, Computer Engineering, or a related field and 5+ years of relevant IC substrate design experience; or M.S. in those fields and 3+ years.
- Experience with the Siemens Xpedition design environment and workflow.
- Experience with high-speed signal routing.
- Experience with large form factor IC substrates.
Nice to have
- 1+ years of experience with advanced IC substrate routing engines, such as AI and physics/model-based routing engines.
- Proficiency in understanding SI/PI/thermal impacts on IC substrate design choices.
Pay
$122,440.00-172,860.00 USD annual target compensation; type not specified
Tools
Siemens Xpedition, DRC, LVS, 2.5D, 3D, AI
AI focus
Preferred experience includes advanced routing engines for IC substrate design, including AI and physics/model-based routing engines.
Model-written summary · the original posting is authoritative