Intel
Senior Analog Design Engineer
$142K–$269K
US, California, Santa Clara · Senior · Full-time · Posted Sep 16, 2026
- Experience
- M.S. plus 4+ years of industry experience, or PhD plus 2+ years.
- Education
- M.S. degree in Electrical Engineering or a related field, or PhD.
About the job
Designs and validates high-speed analog and mixed-signal integrated circuits for silicon photonics optical interconnect products, from architecture through production.
What you'll do
- Architect, design, implement, and validate high-speed, low-voltage, low-power analog and mixed-signal circuits.
- Lead block-level design and collaborate with digital and cross-functional teams on integration and product execution.
- Develop post-silicon test and characterization plans and maintain design documentation.
What they ask for
- M.S. in Electrical Engineering or a related field plus 4+ years of industry experience, or PhD plus 2+ years.
- Hands-on design of high-speed circuit blocks for data rates of 32 Gbps and above.
- Experience designing inductors, transmission lines, TIAs, and optical modulator drivers.
- Expertise in high-speed serial link design and analog CMOS/BiCMOS circuit design using deep-submicron process technologies; experience with full-chip integration, ESD considerations, and verification methodologies.
Nice to have
- Familiarity with optical communication systems and experience developing 400G, 800G, and 1.6T optical links.
- Experience with package design and test setup development, precision analog circuits such as ADCs and DACs, or PAM4 and NRZ link architectures.
Pay
$141,910.00-269,100.00 USD (target compensation; posting does not specify base salary or total pay)
Tools
CMOS, BiCMOS, PLLs, CDR, TIAs, ADCs, DACs, PAM4
Model-written summary · the original posting is authoritative