Intel
Senior EDA Tools Hardware Engineer
$142K–$269K
US, California, Santa Clara +3 · Senior · Full-time · Posted Oct 8, 2026
- Location
- US, California, Santa Clara
US, Oregon, Hillsboro
US, California, Folsom
US, Texas, Austin - Experience
- Bachelor's: 6+ years; master's: 4+ years; Ph.D.: 2+ years of relevant experience. Also requires 3+ years with timing characterization methodologies.
- Education
- Bachelor's, master's, or Ph.D. in Computer Engineering, Electrical Engineering, Computer Science, or a related field.
About the job
Develops and maintains EDA tools and flows for transistor-level timing characterization and timing, power, and noise modeling of custom macros and memory IPs.
What you'll do
- Develop, test, and analyze EDA tools, flows, and methodologies.
- Support and enhance design-automation platforms, databases, scripts, and tools.
- Collaborate with EDA vendors and design teams to evaluate tools and enable hardware development methodologies.
What they ask for
- Bachelor's degree in a related field with 6+ years, master's degree with 4+ years, or Ph.D. with 2+ years of relevant experience.
- 3+ years of experience with timing characterization methodologies, such as Nanotime, Liberate, or PrimeLib.
- Experience with Liberty timing models.
Nice to have
- Experience with SPICE simulation, CMOS circuits, memory architecture, STA, or advanced-node custom IP or memory characterization flows.
- Scripting and automation skills in Linux environments.
Pay
$141,910.00-269,100.00 USD (annual salary)
Tools
Synopsys NanoTime, Cadence Liberate, Nanotime, Liberate, PrimeLib, Liberty, SPICE, Linux
Model-written summary · the original posting is authoritative