Drimva

Intel

Senior Reliability PDK and TFM engineer

$150K–$285K

US, Oregon, Hillsboro +3 · Senior · Full-time · Posted Sep 8, 2026

Location
US, Oregon, Hillsboro
US, California, Folsom
US, California, Santa Clara
US, Arizona, Phoenix
Experience
Minimum qualifications specify 6+ years with a bachelor's degree, 4+ years with a master's degree, or 2+ years with a PhD; also 3+ years in one of the listed specialty areas.
Education
Bachelor's degree in electrical engineering, physics, or a related field; alternatives are a master's degree with 4+ years of relevant experience or a PhD with 2+ years.
Visa sponsorship
Intel U.S. immigration sponsorship guidelines are referenced; no specific visa policy is stated.

About the job

Develop reliability design enablement for Intel technology by creating PDK rules and collateral and enabling EDA tools and flows for reliability verification.

What you'll do

  • Define and generate reliability-related PDK design rules and collateral, including quality assurance and benchmarking.
  • Drive EDA tool and flow enablement with PDK development, internal partners, and vendors.
  • Benchmark technology reliability and deliver PDK, design rules, collateral, TFM, and IP ecosystem for customer designs.

What they ask for

  • Bachelor's degree in electrical engineering, physics, or a related field and 6+ years of relevant work experience; or 4+ years of relevant experience and a master's degree; or a PhD degree with 2+ years of relevant experience.
  • 3+ years' experience in at least one listed area: PDK development, reliability tool and flow, design for reliability, circuit/IP/SoC design reliability validation using PDK, or EDA tool and flow development.

Nice to have

  • Master's or Ph.D. degree in electrical engineering, physics, or related field.
  • Hands-on PDK development and validation; reliability verification knowledge; AI or programming skills for design-rule, techfile-generation, or QA code, agents, or scripts.

Pay

$149,600.00-284,580.00 USD (total compensation)

Tools

PDK, TFM, EDA, BTI, HCI, Electro-Migration, EOS, ESD

AI focus

Preferred qualification includes using AI or programming skills to write code, agents, or scripts for design-rule and techfile generation and quality assurance.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 5, 2026 (UTC)