Intel
Senior Standard Cell Library Engineer
$122K–$232K
US, California, Santa Clara +1 · Senior · Full-time · Posted Oct 12, 2026
- Location
- US, California, Santa Clara
US, California, Folsom - Experience
- 2+ years' experience in one or more of the listed areas; qualifications may come from a combination of industry job experience, internship experience, and/or schoolwork/classes/research.
- Education
- Bachelor's degree in Electrical Engineering, Electronics Engineering, Nanoscience, Microelectronics, Computer Engineering, or a STEM-related field.
About the job
Designs, characterizes, validates, and releases standard-cell designs and collateral, using experiments and physical-design flows to meet power, performance, area, manufacturability, and cost goals.
What you'll do
- Develop, implement, characterize, and validate standard-cell design solutions and physical-design flows.
- Run end-to-end experiments and use data to guide design decisions across technical and management audiences.
- Generate, validate, and release custom standard-cell collateral; collaborate with teams to ensure design, manufacturing, and quality compliance.
What they ask for
- Bachelor's degree in Electrical Engineering, Electronics Engineering, Nanoscience, Microelectronics, Computer Engineering, or a STEM-related field.
- 2+ years' experience in one or more of: standard cell layout, standard cell abstract modeling, standard cell characterization, or ASIC design and verification.
- Experience using one or more of the listed electronic design tools.
- Strong written and verbal communication skills, with the ability to tailor communication to the audience.
Nice to have
- Post Graduate Degree in a listed engineering or STEM-related field.
- Unix proficiency and basic command-line software skills using csh, bash, perl, or python.
Pay
$122,440.00-232,190.00 USD (target compensation; posting does not specify base salary or total pay)
Tools
Cadence Virtuoso, Synopsys Custom Compiler, Cadence Abstract Generator, Synopsys PrimeLib, Cadence Liberate, Synopsys Fusion Compiler, Cadence Innovus, Cadence Tempus
Model-written summary · the original posting is authoritative