Intel
TD Memory Quality and Reliability PhD Intern
$121K–$121K
US, California, Folsom +2 · Internship · Posted Oct 30, 2026
- Location
- US, California, Folsom
US, California, Santa Clara
US, Oregon, Hillsboro - Education
- Currently pursuing a Ph.D. in Electrical Engineering or a related field.
About the job
Analyzes silicon data and develops statistical models to assess memory performance, reliability, and technology readiness for Intel’s advanced process nodes.
What you'll do
- Analyze SRAM, Register File (RF), and Fuse characterization data across operating conditions to identify trends, variability, and risks.
- Perform data analysis, visualization, and modeling, including Vmin/Vmax prediction and Silicon-to-Simulation correlation studies.
- Support technology certification through risk assessments, technical reports, and collaboration with engineering teams.
What they ask for
- Currently pursuing a Ph.D. in Electrical Engineering or a related field.
- Basic knowledge of semiconductor devices, microelectronics, or integrated circuit design.
- Programming or scripting experience using Python or similar languages, and experience analyzing technical, scientific, or research data.
- Cumulative GPA of 3.0 or higher.
Nice to have
- Coursework, research, or experience in memory technologies, semiconductor device physics, VLSI design, statistics, machine learning, data science, or semiconductor process technology.
- Experience with Python, Pandas, NumPy, JMP or other statistical tools, data visualization, statistical modeling, large-scale data analysis, or predictive modeling.
Pay
$120,898.00-120,902.00 USD (target compensation; pay basis not specified)
Tools
Python, JMP, Pandas, NumPy
Model-written summary · the original posting is authoritative