Drimva

Intel

Yield Product Development Engineer

$122K–$232K

US, Oregon, Hillsboro +1 · Full-time · Posted Oct 13, 2026

Location
US, Oregon, Hillsboro
US, Arizona, Phoenix
Experience
5+ years with a Master's, or 2+ years with a Ph.D., in advanced semiconductor devices and process flow.
Education
Master's Degree or Ph.D. in a semiconductor science-related STEM degree in engineering, physical science, computer science, or related field.
Visa sponsorship
Not eligible for Intel immigration sponsorship.

About the job

Identifies and resolves semiconductor manufacturing yield limiters using data analysis, process development, and collaboration across design and factory teams.

What you'll do

  • Analyze fab, defect, and electrical data to identify anomalies and root causes, and develop tools and process changes to improve yield.
  • Drive product introductions, process improvements, design-technology co-optimization, and experiments to ensure manufacturability and product quality.
  • Develop AI/ML applications and computational tools, and document procedures and support production debugging.

What they ask for

  • Master's Degree or Ph.D. in a semiconductor science-related STEM field such as engineering, physical science, or computer science.
  • 5+ years of experience with Master's, or 2+ years of experience with Ph.D., in advanced semiconductor devices and process flow.

Nice to have

  • 2+ years of experience with data analysis systems and software tools.
  • 2+ years of experience in yield projection with EOL signals and in line parameters; project/program management and cross-organizational collaboration experience are also preferred.

Pay

$122,440.00-232,190.00 USD (target compensation; the posting does not specify base salary or total pay)

Tools

machine learning, AI/ML

AI focus

Develops AI/ML applications and computational tools to bridge design and manufacturing, improve design efficiency, and reduce debug time.

Model-written summary · the original posting is authoritative

First seen Oct 14, 2026 · Last verified Nov 5, 2026 (UTC)