Drimva

Jane Street

ASIC Engineer

New York, New York, United States · Full-time · Posted Oct 29, 2025

Experience
4+ years of practical experience in RTL design and verification.

About the job

Designs, verifies, and deploys ASIC and FPGA hardware for Jane Street’s Ultra Low Latency team.

What you'll do

  • Design, test, and deploy advanced hardware designs.
  • Contribute to projects involving FPGA-based and ASIC-based technologies.
  • Apply software engineering techniques and improved tools to the hardware design process.

What they ask for

  • Practical experience in RTL design and verification, with significant focus on ASIC design verification.
  • Experience verifying ASIC designs using Synopsys or Cadence tools.
  • Experience applying software engineering techniques to improve hardware design.
  • Programming experience in a high-level language such as Python, C++, Java, or Haskell.

Nice to have

  • Experience in formal verification.
  • Experience in front-end RTL design and synthesis, or back-end physical design.

Tools

Hardcaml, OCaml, Synopsys, Cadence, Python, C++, Java, Haskell

Model-written summary · the original posting is authoritative

First seen Oct 27, 2026 · Last verified Nov 5, 2026 (UTC)