Drimva

K2 Space

Principal Mixed-Signal Design Engineer, Data Converters

$190K–$285K

United States - Remote +1 · Remote · Principal · Full-time · Posted Sep 15, 2026

Location
United States - Remote
Los Angeles
Experience
Significant industry experience; no number of years stated.
Education
MS or PhD in Electrical Engineering or related field.
Visa sponsorship
Must be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.

About the job

Leads the architecture, design, integration, and silicon validation of high-performance wideband data converters and analog front-ends for mixed-signal SoCs.

What you'll do

  • Architect and design high-speed ADCs, DACs, and supporting analog front-ends; lead architecture trade studies.
  • Own converter development from behavioral modeling and circuit design through integration, verification, and silicon characterization.
  • Establish design methodologies and IP, collaborate across engineering teams, and mentor analog and mixed-signal engineers.

What they ask for

  • MS or PhD in Electrical Engineering or a related field, with significant industry experience in high-performance analog/mixed-signal IC design.
  • Deep expertise designing GHz-class and/or multi-GS/s ADCs and DACs, including converter architectures and impairments.
  • Experience with wideband analog/RF signal paths and high-performance analog circuits in FinFET technologies.
  • Experience taking complex analog/mixed-signal ICs from architecture through tapeout and silicon bring-up; proficiency with industry-standard design, simulation, and verification tools.

Nice to have

  • Experience with RF-sampling or direct-RF architectures, multi-GHz instantaneous bandwidth, or digitally assisted calibration.
  • Experience with large digital-heavy SoCs, advanced packaging, high-speed I/O, signal integrity, or building methodologies and silicon platforms.

Pay

$190,000 – $285,000 USD base salary

Tools

FinFET, SAR, pipeline, time-interleaved, flash/folding, current-steering DACs

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)