Drimva

K2 Space

Principal Mixed-Signal Design Engineer, Data Converters

$190K–$285K

Seattle, WA +1 · Principal · Full-time · Posted Sep 15, 2026

Location
Seattle, WA
Seattle, Washington, United States
Experience
Significant industry experience is required; no specific number of years stated.
Education
MS or PhD in Electrical Engineering or related field.
Visa sponsorship
Must be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.

About the job

Leads architecture, circuit design, integration, and silicon validation of wideband, high-performance data converters and analog front-ends for mixed-signal SoCs.

What you'll do

  • Architect and design high-speed ADCs, DACs, and supporting wideband analog front-ends; lead architecture trade studies.
  • Own converter development from modeling and transistor-level design through layout, verification, tapeout, and silicon characterization.
  • Define specifications and interfaces, drive SoC integration, establish design methodologies, and provide technical leadership and mentorship.

What they ask for

  • MS or PhD in Electrical Engineering or a related field, with significant industry experience in high-performance analog/mixed-signal IC design.
  • Deep expertise designing GHz-class and/or multi-GS/s ADCs and DACs; strong understanding of converter architectures and impairments.
  • Experience designing high-performance analog circuits in FinFET technologies and wideband analog/RF signal paths.
  • Experience taking complex analog/mixed-signal ICs from architecture through tapeout and silicon bring-up; proficiency with industry-standard design, simulation, and verification tools.

Nice to have

  • Experience with RF-sampling or direct-RF architectures, multi-GHz instantaneous bandwidth, or digitally assisted calibration.
  • Experience integrating converters into large digital-heavy SoCs, advanced packaging, high-speed I/O, or building methodologies and silicon platforms.

Pay

$190,000 – $285,000 USD base salary

Tools

FinFET, SAR, pipeline, time-interleaved, flash/folding, current-steering DACs

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)