K2 Space
Senior Post-Silicon Validation Engineer
$170K–$250K
Seattle, WA +1 · Senior · Full-time · Posted Sep 15, 2026
- Location
- Seattle, WA
Seattle, Washington, United States - Experience
- 5+ years; related experience is accepted.
- Education
- BS/MS in Electrical Engineering, Computer Engineering, or equivalent experience.
- Visa sponsorship
- Must be a U.S. person as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
About the job
Owns post-silicon bring-up, characterization, and system-level validation of mixed-signal SoCs, from first silicon through product integration readiness.
What you'll do
- Define and lead silicon validation strategy, test planning, execution, coverage, and sign-off.
- Lead first-silicon bring-up, system-level testing, and cross-functional debug through issue resolution.
- Build lab and automated validation infrastructure for measurement, characterization, regression, and reporting.
What they ask for
- BS/MS in Electrical Engineering, Computer Engineering, or equivalent experience.
- 5+ years of post-silicon validation, SoC bring-up, silicon characterization, or related experience.
- Hands-on mixed-signal SoC/ASIC bring-up and lab test equipment experience.
- Python/scripting skills for lab automation and data analysis; experience with embedded C/C++, JTAG, SPI, UART, and register-level debug.
Nice to have
- RF SoC and RF/analog characterization experience.
- ADC/DAC, PLL, RF transceiver, high-speed SerDes/JESD validation, FPGA prototyping, or RISC-V/ARM SoC experience.
Pay
$170,000 – $250,000 USD base salary
Tools
Python, embedded C/C++, JTAG, SPI, UART, FPGA, RISC-V, ARM
Model-written summary · the original posting is authoritative