K2 Space
Senior Post-Silicon Validation Engineer
$170K–$250K
Los Angeles, CA +1 · Remote · Senior · Full-time · Posted Sep 15, 2026
- Location
- Los Angeles, CA
United States - Remote - Experience
- 5+ years of post-silicon validation, SoC bring-up, silicon characterization, or related experience.
- Education
- BS/MS in Electrical Engineering, Computer Engineering, or equivalent experience.
- Visa sponsorship
- Must be a U.S. person as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
About the job
Owns post-silicon bring-up, characterization, and system-level validation of mixed-signal SoCs, from first silicon through product integration readiness.
What you'll do
- Set validation strategy and lead test planning, execution, coverage, and sign-off, including system-level functional, performance, stress, and corner-case testing.
- Lead silicon bring-up and cross-functional debugging; characterize RF, analog, and mixed-signal blocks and validate DSP and calibration functionality.
- Build lab and automated validation infrastructure, and drive silicon issues through root cause, workaround, and resolution.
What they ask for
- BS/MS in Electrical Engineering, Computer Engineering, or equivalent experience.
- 5+ years of post-silicon validation, SoC bring-up, silicon characterization, or related experience.
- Hands-on experience bringing up complex mixed-signal SoCs/ASICs and transitioning silicon into product/system integration.
- Strong Python/scripting skills for lab automation, instrumentation, and data analysis.
Nice to have
- RF SoC and RF/analog characterization experience.
- ADC/DAC, PLL, RF transceiver, high-speed SerDes/JESD validation, FPGA prototyping, or RISC-V/ARM SoC experience.
Pay
$170,000 – $250,000 USD base salary
Tools
Python, embedded C/C++, JTAG, SPI, UART, FPGA, RISC-V, ARM
Model-written summary · the original posting is authoritative