Lightmatter
Sr. Staff Physical Design Engineer
Toronto, ON +1 · Senior Staff · Full-time · Posted Jul 24, 2026
- Location
- Toronto, ON
Mountain View, CA - Experience
- 12+ years; preferred alternative: Master’s degree with 8 years of industry experience.
- Education
- Bachelor’s in Electrical Engineering or Computer Engineering.
- Visa sponsorship
- Candidates should have capacity to comply with federally mandated U.S. export control laws.
About the job
Implements complex digital ASIC blocks from synthesis through physical verification, driving timing closure, power integrity, signoff, and physical design flows.
What you'll do
- Implement digital blocks in advanced process nodes through physical verification; drive STA signoff, timing and functional ECOs, and DRC/LVS closure.
- Perform power analysis and optimization, floor planning, IO placement, and clock distribution.
- Automate or customize design flows with scripts and work with EDA companies to resolve tool issues.
What they ask for
- Bachelor’s in Electrical Engineering or Computer Engineering.
- 12+ years of industry experience as a Physical Design Engineer.
- Completed block or top-level physical design for large ASICs or mixed-signal chips that taped out.
- Thorough knowledge of timing closure and LVS/DRC closure; experience with TCL and Python or other scripting languages.
Nice to have
- Master’s in Electrical Engineering or Computer Engineering with 8 years of industry experience; hands-on Cadence tools experience.
- Tape-out experience with 3nm designs; EM/IR analysis; willingness to do manual layouts and learn silicon photonics layout.
Pay
$191,000 — $219,000 CAD (total compensation; base salary range is not specified).
Tools
3nm, TCL, Python, Shell, Cadence
AI focus
Supports physical design for high-performance ASICs used in data-center infrastructure for AI and HPC workloads.
Model-written summary · the original posting is authoritative