MatX
ASIC/SOC Silicon Physical Design Engineer
$160K–$600K
Mountain View (HQ) or Remote · Hybrid · Full-time · Posted Feb 16, 2024
- Experience
- Minimum 8 years of industry experience in ASIC Physical Design.
- Education
- Bachelor of Science in Electrical Engineering or equivalent.
- Visa sponsorship
- Employment is contingent on being able to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.
About the job
Develop and deliver physical design for MatX silicon, from RTL through GDSII and sign-off, optimizing performance, power, and area.
What you'll do
- Build scalable physical design methodology across blocks, subsystems, and full-chip designs.
- Own physical design construction and sign-off deliverables, including floorplanning, synthesis, place and route, timing, power estimation, EMIR, and physical verification.
- Coordinate design reviews and milestone reporting, collaborating with Design, DFT, and other physical design partners through tapeout.
What they ask for
- Bachelor of Science in Electrical Engineering or equivalent.
- Minimum 8 years of industry experience in ASIC Physical Design.
- Strong proficiency in Perl, Python, and TCL.
- Expertise in physical design construction and sign-off, and experience collaborating with Design, Verification, and DFT teams to optimize designs through sign-off.
Nice to have
- Experience working with third-party Design Services partners.
Pay
USD $160,000 - $275,000 base salary; USD $175,000 - $400,000 base salary; USD $250,000 - $600,000 base salary
Tools
Perl, Python, TCL, RTL, GDSII
AI focus
Develop silicon for high-performance and sustainable GenAI, supporting compute, memory management, and high-speed connectivity.
Model-written summary · the original posting is authoritative