MatX
Design Verification Engineer
$160K–$600K
Mountain View (HQ) or Remote · Hybrid · Full-time · Posted Jul 15, 2026
- Visa sponsorship
- Employment is contingent on being able to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.
About the job
Develop and execute silicon verification for MatX products, from verification methodology and testbench creation through coverage closure and sign-off milestones.
What you'll do
- Contribute to scalable verification methodology across blocks, subsystems, full-chip, and system-level validation.
- Own subsystem- and chip-level verification work, creating testbenches, tests, and artifacts to close structural and functional coverage.
- Plan and lead verification reviews and track execution and closure through milestones such as design freeze and tapeout.
What they ask for
- Concept-to-silicon experience driving verification from architecture or design specification to production silicon.
- Experience with SystemVerilog, Python, C/C++, Bluespec, or similar verification and modeling languages.
- Production experience with UVM and assertion-based verification; formal and simulated verification experience and comfort are required.
- Production experience creating portable verification tests and drivers applicable to silicon validation and post-silicon debug.
Nice to have
- Familiarity with emulation and prototyping platforms and methodologies.
- Hands-on participation in silicon debug and bring-up.
Pay
$160,000 - $275,000 USD base salary (Early Career); $175,000 - $400,000 USD base salary (Mid Career); $250,000 - $600,000 USD base salary (Senior Career)
Tools
SystemVerilog, Python, C/C++, Bluespec, UVM
Model-written summary · the original posting is authoritative