Drimva

MatX

Microarchitect and RTL Designer - Compute

$175K–$600K

Mountain View (HQ) or Remote · Hybrid · Full-time · Posted Oct 19, 2026

Experience
At least 5 years of silicon design experience; tapeout experience with end-to-end design ownership through multiple generations.
Visa sponsorship
Employment is contingent on the applicant being able to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.

About the job

Own microarchitecture and RTL for compute blocks and subsystems, taking silicon designs from architecture through sign-off and tapeout.

What you'll do

  • Develop scalable silicon architecture-to-design methodology across blocks, subsystems, and full-chip design.
  • Own design deliverables from microarchitecture through sign-off readiness, and drive design reviews, progress, and area and timing closure.
  • Collaborate with verification, DFT, and physical design teams to achieve performance, power, and area goals.

What they ask for

  • At least 5 years of silicon design experience and chip tapeout experience demonstrating end-to-end ownership across multiple generations.
  • Production-proven silicon microarchitecture and design experience in high-performance compute, connectivity, memory management, or related functions.
  • Experience with SystemVerilog, Python, C/C++, and chip-design scripting or programming languages.
  • Experience testing designs with verification teams and hands-on experience with synthesis, design lint, and sign-off flows.

Nice to have

  • Prior Bluespec experience or familiarity with functional-programming paradigms such as Haskell.
  • Experience with ML compute datapaths, verification or emulation, or data movement and storage logic.

Pay

$175,000 – $400,000 USD base salary; $250,000 – $600,000 USD base salary

Tools

Bluespec, Haskell, SystemVerilog, Python, C/C++

AI focus

Design compute hardware for AI/ML workloads, including potential ML arithmetic and compute datapaths.

Model-written summary · the original posting is authoritative

First seen Oct 20, 2026 · Last verified Nov 5, 2026 (UTC)