MatX
SOC Integration Engineer
$160K–$600K
Mountain View · Hybrid · Full-time · Posted Sep 23, 2026
About the job
Develop and automate SoC top-level RTL integration, coordinating subsystem, physical design, verification, and package/board requirements.
What you'll do
- Develop SoC architecture-to-design methods, top-level RTL, and automation for configurable integration builds.
- Coordinate with subsystem and physical design teams on block integration, floorplan connectivity, clocks, resets, and timing constraints.
- Support pin requirements, interposer netlists, memory and DFT wrapper integration, and SoC-level verification and sign-off.
What they ask for
- Proficiency in SystemVerilog and scripting languages such as Python or Perl.
- Experience integrating CPUs, GPUs, accelerators, and high-speed interconnect standards such as UCIE in SoC RTL.
- Working knowledge of logical equivalency verification and memory wrapper generation, including DFT wrappers.
- Hands-on experience with synthesis, linting, clock and reset-domain-crossing, timing constraint validation, and AI-driven automation tools.
Nice to have
- Familiarity with emulation platforms and verification methodologies.
Pay
$160,000 - $275,000 USD base salary; $175,000 - $400,000 USD base salary; $250,000 - $600,000 USD base salary
Tools
SystemVerilog, Python, Perl, UCIE
AI focus
Use AI-driven tools to architect automation for SoC integration and support cross-functional implementation teams.
Model-written summary · the original posting is authoritative