Drimva

Meta

ASIC Engineer, Infrastructure Silicon Validation

$264K–$341K

Sunnyvale, CA · Full-time · Posted Sep 1, 2026

Experience
15+ years in post-silicon validation, silicon bring-up, or ASIC characterization for high-complexity custom ASICs in compute, networking, or storage domains.
Education
Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience.

About the job

Leads end-to-end post-silicon validation, bring-up, characterization, and debug for Meta’s custom infrastructure ASICs used in data centers.

What you'll do

  • Define validation strategies and frameworks, and lead silicon bring-up, characterization, and failure analysis.
  • Coordinate validation milestones and work with design, verification, software, firmware, platform, foundry, and IP teams.
  • Mentor engineers and use post-silicon feedback to inform future ASIC designs.

What they ask for

  • Experience defining and executing validation strategies for high-speed interfaces such as PCIe, DDR, HBM, Ethernet, or custom SerDes links.
  • Experience with DFT methodologies including scan, BIST, JTAG, and boundary scan.
  • Experience leading multi-generational silicon validation programs from tape-out through production qualification in a hyperscale or high-volume manufacturing environment.
  • Experience developing automated silicon characterization and regression frameworks using Python, Tcl, or equivalent.

Nice to have

  • Familiarity with formal verification, emulation platforms, or pre-silicon simulation environments.
  • Experience collaborating with foundry partners on failure analysis, yield improvement, and reliability qualification.

Pay

$264,000/year to $341,000/year (base salary)

Tools

PCIe, DDR, HBM, Ethernet, SerDes, scan, BIST, JTAG

Model-written summary · the original posting is authoritative

First seen Oct 22, 2026 · Last verified Nov 4, 2026 (UTC)