ASIC Engineer, Performance Architecture and Modeling

What you'll do

• Explore microarchitectural trade-offs and develop performance models, simulation environments, and analysis methodologies.
• Build and maintain C++ models and low-level machine-learning workloads; identify bottlenecks and correlate modeled with measured performance.
• Partner across architecture, design, software, and systems teams to shape specifications, optimize workloads, and communicate recommendations.

What they ask for

• Bachelor’s degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.
• 6+ years of experience in ASIC design, silicon engineering, or a related technical field.
• 5+ years of experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs.
• Proficiency in C++ and Python; experience with performance analysis of data center, AI accelerator, or HPC workloads on custom silicon.

Nice to have

• Experience developing cycle-accurate or transaction-level models using C++ and SystemC.
• Experience with CUDA or equivalent GPU frameworks, hardware description languages, post-silicon validation, or PPA optimization.

Pay

$146,000/year to $209,000/year (base salary); bonus and equity (amounts not stated)

Tools

C++, Python, SystemC, CUDA, SystemVerilog, VHDL

AI focus

Models and analyzes custom ASICs for AI and data center workloads; develops machine-learning training and inference workloads and kernels.