ASIC Engineer, Performance Architecture and Modeling (University Grad)

What you'll do

• Explore microarchitectural trade-offs and develop C++ models and simulation environments for custom ASICs.
• Create workloads, benchmarks, and methods to analyze performance and identify bottlenecks.
• Collaborate across architecture, design, software, and systems teams to guide specifications and improve silicon performance.

What they ask for

• Bachelor’s and Master’s or PhD degree in a relevant technical field, or equivalent practical experience; degrees must be completed before joining.
• Proficiency in C++ and Python.
• Experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation.
• Experience analyzing data center, AI accelerator, or HPC workloads on custom silicon.

Nice to have

• Experience with cycle-accurate or transaction-level models using C++ and SystemC.
• Experience with CUDA or equivalent GPU programming frameworks, or familiarity with post-silicon validation and model-to-hardware correlation.

Pay

$114,000/year to $172,000/year (base salary); bonus and equity amounts not specified.

Tools

C++, Python, SystemC, CUDA, SystemVerilog, VHDL

AI focus

Models and analyzes custom ASICs for AI and data center workloads, including machine learning training and inference; the qualifications also mention GenAI inference and Attention mechanisms.