Meta
ASIC Verification Engineer, Networking
$178K–$250K
Sunnyvale, CA · Full-time · Posted Oct 27, 2026
- Experience
- 8+ years.
- Education
- Bachelor’s degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.
About the job
Verifies networking ASIC IP and SoC designs for Meta data center applications, from test planning and testbench development through verification closure.
What you'll do
- Define verification plans, build testbenches, and develop functional tests for IP, subsystems, and SoCs.
- Drive verification closure against defined metrics, debug design failures, and collaborate with design, emulation, and silicon validation teams.
- Improve verification practices using current methodologies, tools, and technologies.
What they ask for
- Bachelor’s degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.
- 8+ years of IP/subsystem and/or SoC verification experience using SystemVerilog UVM/OVM and/or C/C++ based methodologies.
- Experience in at least one listed networking area, such as Ethernet, 400G MAC, NIC, RDMA, PSP, RoCE, or congestion control.
- Experience architecting and implementing verification infrastructure, executing the full verification cycle, scripting with Python, Perl, or TCL, and debugging complex verification challenges.
Nice to have
- Experience verifying high-speed interfaces such as Ethernet, PCIe, DDR, or HBM.
- Experience with ARM/RISC-V subsystems or SoCs, or automated flows for data analysis and performance verification.
Pay
$178,000/year to $250,000/year (base salary)
Tools
SystemVerilog, UVM, OVM, C/C++, Python, Perl, TCL, Ethernet
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