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Display Engineering Intern

Sunnyvale, CA · Internship · Posted Oct 14, 2026

Education
Currently has, or is in the process of obtaining, an MS in Electrical Engineering, Microelectronics, VLSI, or a related field. The posting also lists a PhD in these fields as an alternative.
Visa sponsorship
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment.

About the job

Build and validate pre-silicon simulation models for high-density display arrays, then measure and analyze display artifacts to improve model accuracy.

What you'll do

  • Design and simulate semiconductor circuits; build array-level models incorporating circuit blocks and parasitic extraction.
  • Compare simulation predictions with measured display data and operate optical instruments to measure display performance.
  • Develop display-artifact metrics and automate measurement and analysis using Python/MATLAB.

What they ask for

  • Currently pursuing or obtaining an MS in Electrical Engineering, Microelectronics, VLSI, or a related field.
  • Experience in mixed-signal circuit design and semiconductor device behavior.
  • Hands-on experience with Cadence Virtuoso Schematic Editor and Cadence simulation tools (Spectre/SPICE).
  • Experience programming in Python and/or MATLAB; must obtain and maintain work authorization in the country of employment and intend to return to a full-time degree program after the internship.

Nice to have

  • Background in memory design and characterization or related array structures; familiarity with display technologies and pixel circuits.
  • Experience with optical lab instruments and quantitative display performance metrics.

Pay

$error/year to $error/year

Tools

Cadence Virtuoso Schematic Editor, Spectre/SPICE, Python, MATLAB, SRAM, LCD, OLED, uOLED

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)