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DPU Performance Architect, Infrastructure Silicon
$178K–$250K
Sunnyvale, CA +1 · Full-time · Posted Sep 25, 2026
- Location
- Sunnyvale, CA
Austin, TX - Experience
- 8+ years of relevant industry experience; the posting also lists 15+ years as an alternative qualification.
- Education
- Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience. The posting also lists a PhD in Computer Science, Computer Engineering, or Electrical Engineering.
About the job
Drive performance modeling, analysis, and validation of DPU architectures from early design exploration through RTL validation and silicon correlation.
What you'll do
- Analyze DPU architecture performance and quantify architectural trade-offs to guide design decisions.
- Characterize workloads and develop performance models, simulation tools, and synthetic benchmarks.
- Lead RTL performance validation and correlate pre-silicon projections with post-silicon measurements.
What they ask for
- Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.
- Detailed understanding of DPU architectures, including network virtualization, storage disaggregation, and protocols such as RoCE and NVMe.
- Experience in workload analysis and characterization, data center workloads, and benchmarking methodologies.
- Proficiency in model-development languages such as Python, C/C++, or SystemC, and experience with RTL performance validation.
Nice to have
- Experience with hardware description languages and ASIC simulation environments.
- Experience building performance modeling infrastructure for hyperscale data center ASICs, or with post-silicon validation, Python automation, GPU/ML, high-level synthesis, or PPA optimization.
Pay
$178,000/year to $250,000/year (base salary); bonus and equity amounts are not specified.
Tools
RoCE, NVMe, Python, C/C++, SystemC, SystemVerilog, VHDL
Model-written summary · the original posting is authoritative