Meta
Silicon Packaging Engineer (SIPI)
$178K–$250K
Sunnyvale, CA +1 · Full-time · Posted Sep 18, 2026
- Location
- Sunnyvale, CA
Menlo Park, CA - Experience
- 8+ years in signal integrity analysis, simulation, and measurement; also states 10+ years in SI/PI simulation and validation.
- Education
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Also lists a Master's degree or PhD in Electrical Engineering, Physics, Mathematics, or related field.
About the job
Owns signal- and power-integrity co-design, simulation, and validation across AI/HPC silicon, advanced packages, and boards, from architecture through post-silicon testing.
What you'll do
- Drive chip-package-board SI/PI design, including package stack-up, routing, power delivery, and interface budgets.
- Lead simulation flows, methodology development, validation, and post-silicon measurement and failure analysis.
- Coordinate with ASIC, package, PCB, system, foundry, OSAT, and memory teams on design and qualification.
What they ask for
- Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.
- 8+ years of experience with signal integrity analysis, simulation, and measurement; the posting also states 10+ years in SI/PI simulation and validation.
- Proficiency with HFSS, Sigrity, Hspice, and/or other simulation tools.
- Experience with 2.5D/3D package design and signal and power integrity for high-speed interconnects.
Nice to have
- Experience with post-silicon memory or high-speed SERDES testing and next-generation memory or chiplet standards.
- Experience with Cadence Sigrity, PowerSI, Ansys SIwave, Keysight ADS, 3D layout, and Ansys HFSS.
Pay
$178,000/year to $250,000/year (base salary)
Tools
HFSS, Sigrity, Hspice, Cadence Sigrity, PowerSI, Ansys SIwave, Keysight ADS, Ansys HFSS
AI focus
SI/PI engineering for next-generation AI accelerator silicon.
Model-written summary · the original posting is authoritative