Drimva

Meta

Silicon Validation Engineer, Infra Silicon

$178K–$250K

Sunnyvale, CA · Full-time · Posted Jul 8, 2026

Experience
8+ years in silicon validation, hardware systems engineering, or post-silicon bring-up; 8+ years with pre-silicon validation environments.
Education
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

About the job

Leads end-to-end validation of custom infrastructure ASICs and accelerators, from pre-silicon planning through post-silicon bring-up and data-center deployment.

What you'll do

  • Define and lead functional, performance, reliability, and power validation across pre- and post-silicon phases.
  • Drive silicon bring-up, debug, characterization, and root-cause analysis; develop validation automation and diagnostic tools.
  • Collaborate across design, architecture, firmware, and systems teams to guide productization and address fleet-level failures.

What they ask for

  • Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.
  • 8+ years of experience in silicon validation, hardware systems engineering, or post-silicon bring-up for custom ASICs, SoCs, or accelerators.
  • 8+ years of experience with pre-silicon validation environments, including RTL simulation, emulation platforms, or FPGA prototyping.
  • Experience with post-silicon debug tools and methods, and developing validation automation or diagnostics using Python, C, or C++.

Nice to have

  • Experience with data center infrastructure silicon in large-scale fleet environments.
  • Experience with design-for-testability, server architecture, power and thermal characterization, reliability testing, or yield analysis.

Pay

$178,000/year to $250,000/year (base salary)

Tools

RTL simulation, Python, C, C++, JTAG, PCIe, DDR, FPGA

AI focus

Validation of custom-designed accelerators, including AI/ML accelerators.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)