Micron
DRAM Memory Design Engineer - Principal | MTS | SMTS
Boise, ID - Main Site · Principal · Full-time · Posted Aug 13, 2026
- Experience
- MSEE with 10+ years, BSEE with 12+ years, or equivalent relevant semiconductor design experience; SMTS candidates typically have 15+ years with demonstrated technical leadership.
- Education
- Bachelor's degree in Electrical Engineering or related field; the posting also lists a preferred Master's degree or PhD in Electrical Engineering or a related field.
About the job
Designs and optimizes next-generation DRAM circuits, leading development and validation while contributing technical direction and AI-assisted design improvements.
What you'll do
- Design and optimize digital and analog circuits for DRAM products.
- Lead circuit simulation, verification, silicon validation, layout optimization, and tape-out activities.
- Advance AI-assisted design and automation, and mentor engineers.
What they ask for
- Bachelor's degree in Electrical Engineering or related field, plus MSEE with 10+ years, BSEE with 12+ years, or equivalent relevant semiconductor design experience; SMTS candidates typically have 15+ years with demonstrated technical leadership.
- Extensive knowledge of CMOS circuit design, device physics, state machine logic, and design verification methodologies.
- Experience with Verilog modeling, simulation tools, and power delivery network (PDN) analysis.
- Proficiency in scripting languages such as Python, Tcl, or Perl.
Nice to have
- Experience with DDR5, LPDDR5/LPDDR6, GDDR6/7, or HBM3/HBM4 memory technologies.
- Exposure to AI/ML-assisted design flows, agentic AI, or advanced design automation frameworks.
Tools
Verilog, Python, Tcl, Perl, FINESIM, HSPICE
AI focus
Advance AI-assisted design, automation, and design-space exploration; preferred exposure includes AI/ML-assisted design flows and agentic AI.
Model-written summary · the original posting is authoritative