Micron
DRAM Principal Design Verification Engineer
Boise, ID - Main Site · Principal · Full-time · Posted Oct 24, 2026
- Experience
- 10+ years of relevant digital design verification experience.
- Education
- Bachelor’s or Master’s degree (preferred) in Electrical Engineering, Computer Engineering, or a related engineering field.
About the job
Leads digital verification strategy and execution for next-generation DRAM products, including scalable testbenches, automation, and AI-powered verification solutions.
What you'll do
- Develop verification methodologies and infrastructure, and architect scalable UVM environments, reusable verification IP, and automation.
- Drive verification planning, coverage closure, and silicon quality while partnering across teams to accelerate product development.
- Mentor engineers and advance verification practices, efficiency, and productivity.
What they ask for
- Strong expertise in System Verilog, UVM, constrained-random verification, functional coverage, and assertion-based verification.
- Experience developing scalable digital verification testbenches, reusable verification IP, and automation solutions.
- Hands-on experience with gate-level simulation and debug environments, including circuit simulation and waveform analysis.
- Solid VLSI circuit design fundamentals; strong communication, technical leadership, and mentoring skills.
Nice to have
- Experience with memory products or other high-performance semiconductor designs; analog or mixed-signal verification.
- Advanced Python proficiency and experience applying AI/ML to verification workflows.
Tools
System Verilog, UVM, Python, AI/ML
AI focus
Develop and apply AI-driven verification solutions, including intelligent testbench generation, debug acceleration, coverage analysis, and root-cause analysis.
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