Micron
HBM SoC RTL Design Engineer
$181K–$323K
Folsom, CA · Full-time · Posted Oct 30, 2026
- Experience
- Minimum of 10 years of experience in a related field.
- Education
- Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field.
About the job
Design, integrate, and support RTL for next-generation HBM SoC logic die, working across architecture, verification, physical design, firmware, and product teams.
What you'll do
- Design and implement SoC-level RTL blocks and integrate internal and third-party IP.
- Translate architectural specifications into RTL and contribute to SoC integration, documentation, and design reviews.
- Support pre-silicon validation and post-silicon bring-up, including silicon issue root-cause analysis.
What they ask for
- Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field.
- Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
- Experience with the RTL-to-GDS flow, including synthesis, static timing analysis, and design sign-off considerations.
- Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens; programming or scripting experience.
Nice to have
- Experience with HBM, DRAM, or memory-centric SoC designs.
- Familiarity with high-speed interfaces, DFT, or hardware emulation and acceleration platforms.
Pay
$181,000.00 - $323,000.00 a year (USD, base salary)
Tools
SystemVerilog, Verilog, Cadence, Synopsys, Siemens, Python, TCL, Perl
Model-written summary · the original posting is authoritative