Micron
Interface Design Architect, HBM - DMTS
Richardson, TX · Full-time · Posted Sep 30, 2026
- Experience
- 18+ years; no alternatives stated.
- Education
- Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or a related field.
About the job
Leads architecture and delivery of high-speed HBM and other memory-interface systems, from design through silicon bring-up, while coordinating multidisciplinary teams and developing next-generation interface solutions.
What you'll do
- Own HBM I/O blocks and subsystems from architecture through implementation, verification, tape-out, and post-silicon debug.
- Lead interface architecture and design, balancing performance, power, reliability, and implementation trade-offs across advanced packaging systems.
- Coordinate interface programs and collaborate with engineering teams, customers, and ecosystem partners on current and next-generation solutions.
What they ask for
- 18+ years of experience in HBM, DDR, LPDDR, advanced memory, high-speed PHY, mixed-signal design, SoC, or ASIC design roles.
- Experience delivering complex interface IP or subsystems from architecture through silicon bring-up and post-silicon debug.
- Expertise in high-speed memory-interface architecture and design; experience in analog and mixed-signal design, RTL, and front-end implementation and verification.
- Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or a related field.
Nice to have
- Direct experience with HBM, DDR, or LPDDR PHYs or complete PHY and controller subsystems.
- Experience with CPO, UCIe or other die-to-die interfaces, chiplets, or advanced packaging.
Tools
HBM, DDR, LPDDR, RTL, Verilog, SystemVerilog, FastSPICE, HSPICE
AI focus
Develops next-generation HBM, CPO, chiplet, and heterogeneous-integration architectures for AI, machine-learning, and high-performance computing workloads.
Model-written summary · the original posting is authoritative