Micron
Intern - DRAM ARCHITECTURE
San Jose, CA +1 · Internship · Posted Oct 1, 2026
- Location
- San Jose, CA
Boise, ID - Main Site - Experience
- 0-2 years of relevant experience through research, internships, academic projects, publications, or engineering experience.
- Education
- Currently pursuing a Master's or PhD degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.
About the job
Develop software, simulation, and AI-assisted tools to analyze next-generation DRAM architectures and accelerate memory architecture research.
What you'll do
- Build software frameworks, simulation environments, and automation tools for DRAM research and evaluation.
- Design AI-assisted workflows for simulations, experiments, data analysis, documentation, and engineering productivity.
- Model and analyze memory architectures and characterize performance, power, bandwidth, latency, and workloads.
What they ask for
- Currently pursuing a Master's or PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.
- Programming experience in Python, C++, or similar languages.
- Familiarity with computer architecture, memory systems, performance analysis, modeling, simulation, or systems research.
- Demonstrated use of AI-enabled tools and generative AI platforms such as Microsoft Copilot, GPT, Claude, or Gemini.
Nice to have
- Experience with AI agents, RAG systems, LLM-based engineering tools, or AI workflow orchestration.
- Experience with memory architectures, architectural simulators, performance modeling, or relevant research.
Pay
$46.51 - $55.82 an hour USD base salary
Tools
Python, C++, Microsoft Copilot, GPT, Claude, Gemini, RAG
AI focus
Develop and apply AI-assisted workflows and tools to automate simulations, experiments, data analysis, documentation, and design-space exploration.
Model-written summary · the original posting is authoritative