Micron
Member of Technical Staff, SoC Power and Physical Architect, Next-generation HBM Architecture
$191K–$334K
Folsom, CA · Staff · Full-time · Posted Jul 10, 2026
- Experience
- 8+ years of industry experience delivering SoC hardware designs.
- Education
- A Masters or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience.
About the job
Defines SoC-level specifications and power, physical, and DFT architectures for next-generation 3D-stacked HBM products, collaborating with architecture and design teams.
What you'll do
- Define clocking, power sequencing and delivery, on-die signal interfaces, and DFT architectures and verification requirements.
- Analyze power-delivery networks and thermal implications; identify and mitigate power hotspots.
- Define SoC floorplans with physical designers and maintain physical documentation.
What they ask for
- Experience with HBM architectures.
- Ability to influence decisions through data-driven analysis and clear communication.
- Master’s or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience.
- 8+ years of industry experience delivering SoC hardware designs.
Nice to have
- Circuit-design experience, including IP interface requirements, power delivery behavior, and clocking constraints; familiarity with chip-level thermal analysis and hotspot mitigation.
- Experience with synthesis, static timing analysis, and EDA tools including PrimePower, PrimeShield, RedHawk, and ICC2.
Pay
$191,000.00 - $334,000.00 a year USD (base salary)
Tools
PrimePower, PrimeShield, RedHawk, ICC2
AI focus
Develops memory architecture for emerging AI systems and applications; this role focuses on next-generation HBM SoC architecture.
Model-written summary · the original posting is authoritative