Drimva

Micron

MTS, AI Optimized Memory Digital Design Engineer

$175K–$309K

Folsom, CA +1 · Full-time · Posted Aug 4, 2026

Location
Folsom, CA
Richardson, TX
Experience
5+ years of industry experience delivering silicon-proven memory systems or SoC hardware designs on modern process nodes (preferred).
Education
Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field; Master’s or PhD, or equivalent experience, preferred.

About the job

Designs and implements high-performance memory hardware for AI workloads, from architecture requirements through silicon, optimizing performance, power, area, and reliability.

What you'll do

  • Translate architecture requirements into microarchitectures and drive hardware implementation through silicon.
  • Design, implement, and review SystemVerilog RTL; perform synthesis and early PPA analysis and optimization.
  • Maintain microarchitecture documentation and evaluate design tradeoffs to inform technical decisions.

What they ask for

  • Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field.
  • Strong digital-design and microarchitecture experience, with hardware-block ownership from specification through implementation.
  • Solid understanding of computer architecture and memory systems, including SoC-level behaviors and tradeoffs; experience with synthesis and early PPA estimation and optimization.
  • Proficiency in SystemVerilog and at least one of C, C++, or Python.

Nice to have

  • Master’s or PhD in a listed technical field, or equivalent experience; familiarity with memory interfaces, reliability features, and media management.
  • Experience influencing architecture features and working with Agentic AI tools for design and verification.

Pay

$175,000.00 - $309,000.00 a year (USD, base salary)

Tools

SystemVerilog, C, C++, Python

AI focus

Designs memory architectures for AI workloads; preferred experience using Agentic AI tools to assist with design and verification.

Model-written summary · the original posting is authoritative

First seen Oct 16, 2026 · Last verified Nov 5, 2026 (UTC)