Micron
MTS - HIG HBM - ARCHITECTURE
Richardson, TX · Full-time · Posted Sep 23, 2026
- Experience
- 10+ years of relevant Engineering or Design Engineering experience on high-speed IO, PLL, Tx, Rx, Equalization, or clock tree.
- Education
- MS or PhD in EE.
About the job
Architects high-speed HBM I/O and establishes processes that capture silicon results and improve design quality across product generations.
What you'll do
- Design high-speed I/O architecture for HBM products and standardize quality processes from architecture through silicon.
- Correlate silicon measurements with simulations and analyze circuit performance with Product Engineering.
- Use AI-assisted analytics and cross-functional data collection to identify root causes and feed silicon learnings into future designs.
What they ask for
- Industrial experience in high-speed clocking design at 32Gbps+ speed.
- Background in I/O circuit design, analog and digital design, and simulation.
- Experience with circuit verification and optimization, including layout verification and parasitic extraction.
- MS or PhD in EE.
Nice to have
- Prior circuit-debug experience through Product Engineering or equivalent.
- Knowledge of advanced packaging environments such as CoWoS, HBM stack, and D2D.
Tools
UCIe, HBM, DDR, PCIe, MIPI, CoWoS
AI focus
Leverage AI-assisted analytics to accelerate root-cause identification from complex, multi-variable silicon data.
Model-written summary · the original posting is authoritative