New College Grad - ENGINEER, DDEG IP DEVELOPMENT

What you'll do

• Design, analyze, and optimize CMOS circuits, including power delivery network circuitry and block-level power generators.
• Collaborate with cross-functional teams to develop memory products that meet performance, quality, manufacturing, and cost objectives.
• Perform circuit and layout verification, parasitic extraction analysis, and silicon correlation.

What they ask for

• Bachelor’s degree in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field with 5 years of progressive post-baccalaureate experience; OR Master’s degree in one of these fields or a related field with 3 years of relevant experience.
• Experience with analog and digital circuit design and simulation, and with power delivery network (PDN) circuit design, analysis, and optimization.
• Experience using UNIX and CADENCE design environments, including simulation, schematic entry, and SPF extraction.
• Experience performing circuit verification, layout verification, parasitic extraction, semiconductor device evaluation, and circuit optimization.

Nice to have

• Experience designing memory circuits, including DRAM or other high-performance semiconductor products.
• Understanding of transistor modeling, CMOS design methodologies, and silicon validation; experience with cross-functional teams or AI-assisted engineering workflows.

Tools

CMOS, DRAM, PDN, UNIX, CADENCE, SPF, Microsoft Copilot

AI focus

Use AI-enabled tools, including Microsoft Copilot and approved AI solutions, to improve productivity and engineering decision-making; validate AI-generated outputs for accuracy, quality, and compliance.