New College Grad - Mixed Signal Design Engineer, HBM

What you'll do

• Define micro-architecture and implement synthesizable SystemVerilog RTL for HBM base-die subsystems.
• Partner with verification, architecture, physical-layer, DFT, and test teams to support integration, verification, and design debug.
• Support silicon bring-up and post-silicon validation, using AI-assisted tools for productivity, debugging, and analysis.

What they ask for

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Experience with digital design, SoC integration, or semiconductor development through academic projects, internships, research, or industry experience.
• Solid understanding of SystemVerilog RTL development, clock and reset architectures, CDC/RDC methodologies, and low-power design concepts.
• Understanding of design-for-debug and design-for-test principles; ability to collaborate effectively across engineering teams.

Nice to have

• Exposure to post-silicon validation, silicon bring-up, or structured hardware debug methodologies.
• Familiarity with scan, MBIST, LBIST, or related test and debug architectures.

Tools

SystemVerilog, CDC/RDC, scan, MBIST, LBIST

AI focus

Apply AI-assisted or AI-enabled tools to engineering workflows, debug, data analysis, productivity, and performance optimization.