Principal Foundry Interface Design Engineer, HBM

What you'll do

• Serve as the technical interface between foundries and Micron design teams, closing design-process gaps and shaping technology requirements and roadmaps.
• Evaluate technologies through HSPICE simulation, test-chip planning and silicon validation, and PDK and design-enablement work.
• Implement AI-enabled workflows and automation to improve engineering productivity, decision-making, and knowledge sharing.

What they ask for

• BS, MS, or PhD or equivalent experience in Electrical Engineering, Computer Engineering, or a related field.
• 6+ years of semiconductor industry experience and a solid grasp of advanced semiconductor technology development.
• Strong understanding of advanced CMOS nodes, FinFET devices, and process integration.
• Hands-on experience with HSPICE simulations, device characterization, standard cell benchmarking, PPA analysis, parasitic extraction, and physical verification; experience driving AI-enabled engineering practices and automation.

Nice to have

• Experience working directly with leading foundries such as TSMC, Samsung, Intel Foundry Services, or GlobalFoundries; experience with DRAM, HBM, or SRAM.
• Knowledge of TSV technologies, advanced packaging, reliability modeling and aging simulations, advanced BEOL technologies, or PDK development and validation; experience leading technology pathfinding and node selection.

Pay

$146,000.00 - $297,000.00 a year (USD; base salary)

Tools

HSPICE, TSV, BEOL, PDK, SPICE, FinFET, DRAM, HBM

AI focus

Implement AI-enabled workflows and automation for DTCO analysis, foundry collateral evaluation, PDK enablement, benchmarking, knowledge sharing, and engineering productivity. AI tools may be used to analyze and extract insights from PDK documentation, Design Rule Manuals, reliability reports, foundry collateral, and silicon characterization data.