Micron
Principal Physical Design
Boise, ID - Main Site · Principal · Full-time · Posted Aug 14, 2026
- Experience
- 8+ years with a Master's degree, or 10+ years with a Bachelor's degree, in ASIC physical design.
- Education
- Master's degree in Electrical Engineering (or equivalent), or Bachelor's degree.
About the job
Leads physical design implementation and signoff for advanced DRAM digital designs from RTL through tapeout, focusing on timing, power integrity, reliability, and methodology development.
What you'll do
- Lead floorplanning, place and route, clock tree synthesis, timing closure, and tapeout.
- Drive power integrity planning and signoff, including IR drop and electromigration analysis.
- Develop scalable methodologies and automation, collaborate across teams, and mentor engineers.
What they ask for
- Master's degree in Electrical Engineering (or equivalent) with 8+ years of experience, or Bachelor's degree with 10+ years of experience in ASIC physical design.
- Expertise in physical design implementation flows and design signoff.
- Hands-on experience with STA, signal integrity, power integrity, physical verification, and advanced process technologies.
- Proficiency with physical design/signoff tools such as Synopsys IC Compiler II (ICC2), Fusion Compiler, PrimeTime, PrimePower, and RedHawk (or equivalent); scripting skills using Python, Tcl, or similar languages.
Nice to have
- Experience developing physical design, PDN, or EMIR methodologies for large-scale ASIC, SoC, or memory products.
- Experience with power integrity signoff, methodology transformation, technical leadership, and AI-assisted or Generative AI tools.
Tools
Synopsys IC Compiler II (ICC2), Fusion Compiler, PrimeTime, PrimePower, RedHawk, Python, Tcl
AI focus
Use AI-assisted technologies and Generative AI tools to improve engineering efficiency and innovation.
Model-written summary · the original posting is authoritative