Drimva

Micron

Senior CAD Engineer – Physical Verification

Boise, ID - Main Site · Senior · Full-time · Posted Oct 19, 2026

Experience
5+ years of industry experience in CAD, EDA, or semiconductor design.
Education
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.

About the job

Develops physical verification tools, rule decks, and methodologies for memory products, supporting signoff and production flows.

What you'll do

  • Develop, debug, qualify, and release DRC/LVS rule decks and verification checks; define test cases, coverage, and regression methods.
  • Partner with cross-functional teams to establish signoff strategies and resolve verification issues; guide teams with debugging, training, and production support.
  • Automate verification setup, execution, and reporting, including AI-assisted analysis and debugging; evaluate EDA technologies and lead technical projects.

What they ask for

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
  • 5+ years of industry experience in CAD, EDA, or semiconductor design.
  • Experience with DRC and LVS physical verification, IC layout, and process design rules.
  • Proficiency in Python and at least one additional language (such as SKILL, Tcl, Perl, C, or C++), plus Linux/Unix and shell scripting.

Nice to have

  • Experience developing and qualifying Calibre DRC/LVS rule decks in SVRF; knowledge of nmDRC, nmLVS, and RVE.
  • Experience applying AI/ML, large language models, or agentic AI to engineering workflows.

Tools

Siemens Calibre, SVRF, Python, SKILL, Tcl, Perl, C, C++

AI focus

Automate verification workflows with AI-assisted analysis and debugging; preferred experience applying AI/ML, large language models, or agentic AI to engineering workflows.

Model-written summary · the original posting is authoritative

First seen Oct 20, 2026 · Last verified Nov 5, 2026 (UTC)