Micron
Senior CAD Engineer – Physical Verification
$104K–$221K
Boise, ID - Main Site +1 · Senior · Full-time · Posted Oct 30, 2026
- Location
- Boise, ID - Main Site
San Jose, CA - Experience
- 5+ years of industry experience in CAD, EDA, or semiconductor design.
- Education
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
About the job
Develops and supports physical verification tools, flows, and rule decks for Micron memory products, helping design teams achieve signoff and resolve verification issues.
What you'll do
- Develop, debug, qualify, and release Calibre DRC/LVS rule decks and verification flows.
- Translate process design rules into checks, test cases, coverage criteria, and regression methods.
- Partner with engineering teams on signoff, issue resolution, training, automation, and verification improvements.
What they ask for
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
- Experience with DRC/LVS physical verification, IC layout, and process design rules.
- Proficiency in Python and at least one additional language, plus Linux/Unix and shell scripting.
- Solid CMOS and VLSI fundamentals; ability to resolve complex production verification issues.
Nice to have
- Experience developing Calibre rule decks in SVRF and using nmDRC, nmLVS, and RVE.
- Experience applying AI/ML, large language models, or agentic AI to engineering workflows.
Pay
$104,000.00 - $221,000.00 a year USD (base salary)
Tools
Siemens Calibre, SVRF, Python, SKILL, Tcl, Perl, C, C++
AI focus
Automates verification setup, execution, and reporting, including AI-assisted analysis and debugging; AI/ML, large language models, and agentic AI experience are preferred.
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