Micron
Senior Design Engineer
$120K–$204K
San Jose, CA · Senior · Full-time · Posted Oct 8, 2026
- Experience
- 4+ years of NAND design relevant proven experience required.
- Education
- MS in electrical engineering required; PhD preferred.
About the job
Design and optimize NAND memory core and mixed-signal circuits, from array architecture and waveforms through simulation, layout integration, and manufacturing-focused improvements.
What you'll do
- Develop NAND array waveforms and wordline/bitline architecture; analyze area, performance, power, and die-size tradeoffs.
- Create and integrate circuit schematics, run block-level, subsystem, and full-chip simulations, and guide layout implementation.
- Build Python-based automation and AI-assisted EDA workflows; collaborate with engineering and manufacturing teams to improve products.
What they ask for
- MS in electrical engineering; PhD preferred.
- 4+ years of NAND design relevant proven experience.
- Strong semiconductor/device physics and analog/mixed-signal circuit fundamentals, including reliability, EM, and IR analysis.
- Circuit verification and optimization, layout planning and guidance, parasitic extraction, and strong Python coding skills.
Nice to have
- Knowledge of HSPICE, Fast SPICE, Verilog, Cadence design, or LVS/DRC tools.
- Familiarity with Linux/UNIX and scripting languages.
Pay
$120,000.00 - $204,000.00 a year USD base salary
Tools
Python, Bash, Tcl, CSV, JSON, SQLite, HSPICE, Fast SPICE
AI focus
Develop AI-assisted EDA utilities and workflows for design setup, corner execution, regression runs, documentation, and predictive design/layout techniques.
Model-written summary · the original posting is authoritative