Senior Engineer, FECOS cPIE Process Integration (Loop Integration)

What you'll do

• Optimize process-loop performance and analyze interactions across manufacturing areas to improve yield, quality, reliability, and capability.
• Lead root-cause investigations using inline, electrical, defect, and physical-analysis data; develop and implement process improvements.
• Coordinate qualification, technology ramp, monitoring plans, and deployment of standards across manufacturing sites.

What they ask for

• Bachelor's degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related engineering field.
• 5+ years in semiconductor process integration, process engineering, or technology development.
• 5+ years in yield improvement, defect reduction, failure analysis, or process optimization.
• 5+ years analyzing engineering, manufacturing, or process datasets and translating findings into technical solutions; 5+ years collaborating with cross-functional teams.

Nice to have

• Master's degree or PhD in a related engineering field.
• 7+ years in advanced semiconductor integration or high-volume manufacturing, yield improvement, process conversions, or technology ramps; experience with AI, machine learning, analytics, automation, or multi-site standards.

Tools

Artificial Intelligence, machine learning, advanced analytics, automation, inline, electrical, defect, physical analysis

AI focus

Use AI tools and advanced analytics to improve engineering productivity, accelerate problem solving, and enhance process understanding and performance.