Micron
SR RTL DESIGN
Boise, ID - Main Site · Senior · Full-time · Posted Jun 3, 2026
- Experience
- 4+ years with a Master’s degree in Electrical Engineering, or 5+ years of pre-silicon RTL design experience with a Bachelor’s degree.
- Education
- Master’s degree in Electrical Engineering or Bachelor’s degree.
About the job
Develops digital and mixed-signal RTL blocks for DRAM products, supporting the design lifecycle from specification through signoff and handoff while meeting PPA targets.
What you'll do
- Develop and document RTL for DRAM digital and mixed-signal components using RTL-to-GDS flows.
- Run front-end checks including lint, CDC/RDC, synthesis, UPF, and timing QoR.
- Work with physical design and implementation teams on timing closure, PPA goals, and silicon risk reduction.
What they ask for
- Master’s degree in Electrical Engineering with 4+ years of experience, or Bachelor’s degree with 5+ years of pre-silicon RTL design experience.
- Experience developing complex digital IP RTL from specification through implementation handoff.
- Hands-on ASIC low-power design experience, including UPF-based power intent and CDC/RDC analysis.
- Knowledge of ASIC design flows and proficiency in Verilog/SystemVerilog and industry-standard RTL simulation tools.
Nice to have
- Experience working across architecture, verification, and physical design teams to address PPA challenges.
- Experience with mixed-signal-interfacing RTL, CMOS concepts, memory, or high-performance digital design.
Tools
RTL-to-GDS, lint, CDC/RDC, synthesis, UPF, static timing analysis, Verilog, SystemVerilog
Model-written summary · the original posting is authoritative