Micron
Sr/ Staff Design Engineer/Architect(Datapath), HBM
Richardson, TX · Staff · Full-time · Posted Oct 28, 2026
- Experience
- 6+ years with a Bachelor’s degree, or 4+ years with a Master’s degree; also requires 2+ years in high-speed digital datapath design and 2+ years of hands-on implementation experience.
- Education
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, or a Master’s degree.
About the job
Architects, designs, and optimizes high-speed read and write datapaths for next-generation HBM products, from microarchitecture through silicon bring-up and production.
What you'll do
- Design HBM datapaths across core and logic dies, including alignment, buffering, timing, and control logic.
- Optimize datapath circuits for bandwidth, power, area, latency, and timing; integrate reliability features such as parity, ECC hooks, lane redundancy, and remapping.
- Coordinate with design, PHY, DFT, verification, layout, and system teams on implementation, testability, manufacturability, reviews, and documentation.
What they ask for
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field with 6+ years of relevant industry experience, or a Master’s degree with 4+ years of relevant industry experience.
- 2+ years of experience in high-speed digital datapath design (memory, SerDes, or SoC datapath).
- 2+ years of hands-on experience with digital schematic build, RTL, or mixed-signal datapath implementations.
Nice to have
- Strong understanding of HBM/DRAM architectures, including read/write data flow, timing, and multi-channel operation.
- Working knowledge of layout and floorplanning, static timing analysis (STA), timing closure, or advanced process-node challenges.
Tools
HBM, DRAM, SerDes, SoC, RTL, STA, ECC, DFT
AI focus
Use AI to efficiently execute regular work.
Model-written summary · the original posting is authoritative