Micron
Staff Design Verification Engineer/Architect, HBM
Richardson, TX · Staff · Full-time · Posted Sep 15, 2026
- Experience
- 7+ years of relevant verification engineering experience; over 5 years in digital, analog, or mixed-signal verification; over 4 years in custom or RTL design verification. Preferred: more than 9 years in verification engineering roles, or over 4 years in memory products using JEDEC specifications.
- Education
- Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or related field.
About the job
Architect and deliver scalable verification strategies and solutions for current and future HBM DRAM products across IP- and SoC-level designs, collaborating with customers and engineering teams.
What you'll do
- Develop verification plans, architecture collateral, and turnkey solutions for future designs.
- Drive customer co-verification, mentor engineers, and improve verification methodology, including GenAI applications.
- Debug pre- and post-silicon issues using AI and assess feasibility of future product architectures.
What they ask for
- Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or a related field.
- 7+ years of relevant verification engineering experience, including over 5 years in digital (Verilog), analog (FastSpice), or mixed-signal verification.
- Over 4 years in custom design verification or RTL design verification flows.
- Ability to independently define and drive verification strategies for sophisticated projects; strong verbal and written communication skills.
Nice to have
- Master's degree in a related field, or equivalent experience, accompanied by more than 9 years in verification engineering roles.
- Innovation evidence such as patents, trade secrets, or publications; or over 4 years in memory products using JEDEC specifications, preferably HBM, with hands-on verification-flow development.
Tools
HBM, DRAM, Verilog, FastSpice, JEDEC, GenAI, AI, TSV (Through Silicon Via)
AI focus
Develop GenAI applications to improve verification schedules, quality, and capability; leverage AI to accelerate debugging and root-cause analysis.
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