Micron
Staff Engineer, Advanced Packaging Development - Design Enablement & Layout
Boise, ID - Main Site · Staff · Full-time · Posted Oct 14, 2026
- Experience
- 5+ years in the semiconductor industry in areas such as Process Integration, Yield Enhancement, Product Engineering, Design, Test Structure Development, or Unit Process Development.
- Education
- BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or a related field.
About the job
Develops design rules, layout designs, test structures, and evaluation methods for advanced packaging technology, using data analysis and AI to accelerate development.
What you'll do
- Develop design rules, requirements, test structures, and layout/DBR test vehicle and product designs for advanced packaging.
- Manage structure evaluation, analyze data, quantify process margins, and use AI to reduce development time.
- Resolve layout-related process issues, communicate solutions, and align design rules across nodes and teams.
What they ask for
- BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or a related field.
- Strong understanding of semiconductor memory process flows and TSV-based packaging.
- Hands-on proficiency with EDA tools, such as Cadence Virtuoso Layout and Schematic Editor, Calibre, or Hspice.
- Experience with design rule characterization and validation on silicon; proficiency in Python, R, or MATLAB.
Nice to have
- End-to-end experience across design, layout, verification, and tape out.
- Creation of agentic workflows for design layout verification.
Tools
Cadence Virtuoso Layout and Schematic Editor, Calibre, Hspice, Python, R, MATLAB
AI focus
Leverage artificial intelligence to reduce development time; agentic workflows for design layout verification are a nice-to-have.
Model-written summary · the original posting is authoritative