Drimva

Micron

Staff Engineer, APTD Backgrind/Edge Trim

Boise, ID - Main Site · Staff · Full-time · Posted Oct 8, 2026

Experience
Minimum 4 years; alternatively, preferred PhD in a related field with 2+ years of relevant industry experience.
Education
BS or MS degree; preferred PhD in a related field.

About the job

Develops and scales wafer edge trim, backgrind, and thinning processes for advanced packaging, improving performance, yield, cost, and wafer reliability.

What you'll do

  • Develop and optimize wafer-processing processes, using data and equipment or consumable innovation to improve capability, yield, cost, and wafer integrity.
  • Analyze wafer damage and process failures, identify root causes, and develop mitigation strategies; conduct early-stage research for ultra-thin wafer processing.
  • Support process transfer and production ramp at manufacturing sites; limited domestic and/or international travel may be required.

What they ask for

  • BS or MS degree and at least 4 years of relevant semiconductor-industry experience in wafer edge trim, backgrind, wafer thinning, CMP, or mechanical wafer processing.
  • R&D experience advancing wafer-processing capability through structured experimentation.
  • Expertise in experimental design (DOE), data analysis, and interpreting results to improve processes or technology.
  • Strong analytical and problem-solving ability, with demonstrated success addressing complex process, yield, and reliability issues.

Nice to have

  • PhD in a related field with 2+ years of relevant industry experience.
  • Statistical analysis/SPC, advanced packaging exposure, or familiarity with Python scripting, automation, or GenAI-enabled analysis.

Tools

CMP, DOE, SPC, Python, MS Office

AI focus

Familiarity with GenAI-enabled analysis is preferred; the role focuses on wafer-processing R&D.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)